Mixed-Signal
Solutions to Streamline Smart Everything
Our rich mixed-signal technologies enable ASICs and SoCs that are controlling and connecting devices across industries.
Design IP
Modular and Configurable Design IP Enable Your Unique Ideas
- ARM and RISC-V core processors
- AD/DA converters
- Oscillators, comparators
- Communication interfaces
- Embedded NVM
SoC Reference Designs
A Head Start Accelerates Your Time To Market (2H 2020)
- Smart RFID
- Power Management ICs (PMIC)
130 nm Process Technologies
Billions of Devices Made for Automotive and Consumer Applications
- Infotainment, climate control electronics, ADAS/safety
- Wearables, smart home, personal electronics, vision systems, smart grid
- DNA sequencing, wireless interfaces, GPS receiver modules
Prototyping Services
Verify Your Concepts with Rapid MPW Prototyping Service
- Prototype concepts with a fast feedback loop
- Verify IP and characterize device performance
- Regularly recurring shuttles available for 90 nm and 130 nm process flows
Production Process Flows
CMOS mixed-signal production process flows are the foundation of our technology offerings. These standard flows and custom variations enable innovators to bring novel ideas to market for silicon and next-wave technologies.
| Design Rule (nm) | 65* | 90 | 130 | 180 | 250 | 350 |
|---|---|---|---|---|---|---|
| # Layers Metal | 3-5 | 3-7 | 3-5 | 3-4 | 3-4 | 2-3 |
| # Layers Local Interconnect | 2 | 2 | 1 | 1 | 1 | 1 |
| SAC Contact | Y | Y | Y | Y | Y | Y |
| SONOS Embedded NVM | - | - | Y | - | - | Y |
| Low-power SRAM | Y | Y | Y | Y | Y | - |
| Isolation | STI | STI | STI | STI | Sr-LOCOS | Sr-LOCOS |
| Gate | W-clad Poly | W-clad Poly | Poly | Poly | Poly | Poly |
| FET voltages | 1.0V core; 3.3V I/O | 1.2V core; 3.3V I/O | 1.8V core; 3.3-5V I/O | 1.8V core; 3.3V I/O | 3.3V | 5.0V |
| NPN + CMOS | - | - | - | - | Y | - |
| MiM Capacitor | - | Y | Y | - | Y | - |
| Precision Resistor | - | - | Y | - | Y | - |
| Inductor | - | - | Y | - | - | - |
| OTP | - | - | Y | - | - | - |
| Polyimide | Y | Y | Y | Y | Y | Y |
| Dual-Damascene Interconnect | Y | Y | - | - | - | - |
| SOI | - | - | Y | - | - | - |
Notes:
- SkyWater will customize process flows
- *65 nm process was qualified but not currently in production
Learn More About Our Services
