ASICs, SoCs &
CMOS + novel hybrid solutions
SkyWater’s proven CMOS technologies have enabled novel and disruptive products across demanding automotive, industrial, medical and defense markets for decades. As the production foundation, these technologies run in high volume and at world-class quality levels, as demonstrated by numerous quality-driven certifications. But it does not end there: SkyWater’s Advanced Technology Services enable the combination of standard CMOS platforms with a wide range of customer-driven additional devices to create highly customized, targeted integrated sensors, photonics, MEMS or other features.
90 nm and 130 nm process technologies
Billions of Devices Made for Automotive and Consumer Applications
- Infotainment, body electronics, ADAS/safety
- Wearables, smart home, personal electronics, vision systems, smart grid
- DNA sequencing, wireless interfaces, GPS receiver modules
- Read-Out ICs for thermal imaging applications
- CNT/3DSoC/ReRAM technology on 130nm for edge node processing and sensing
- SkyWater also has a state-of-the-art 90nm RadHard by Process technology
Process Features for 90 nm ROICs
Specialized devices and structures to enable high resolution and sensitivity thermal imaging systems and sensor arrays.
- Cryo models at 45 K, 77 K, 120 K, 150 K
- Dual stack MiM caps with various configurations
- Tungsten filled through silicon vias, or TSV, for stacked die configuration
- Topside planarization with pixel contacts
- Stitching support for large format die
- Communication interfaces
- Rad-Tolerant 90 nm process baseline
SkyWater MPW Shuttle Services
Most designs with volume potential will run on a multi-project wafer to verify performance and features prior to generating a dedicated mask set for production. Dedicated SkyWater MPW prototyping services are available on 130nm, 90nm, 90nm ROIC, and RH90.
- Prototype concepts with a fast feedback loop
- Verify IP and characterize device performance
- Regularly recurring shuttles
Robust and flexible platforms for conventional and hybrid solutions
Production Process Flow Features
CMOS mixed-signal production process flows are the foundation of our technology offerings. These standard flows and custom variations enable innovators to bring novel ideas to market for silicon and next-wave technologies. Solutions can support conventional SoC and ASIC designs or be combined with your unique idea to create completely differentiated sensor, MEMS, photonics or other structures.
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| Technology | RH90* | S90 | S130 |
|---|---|---|---|
| Process | 90nm SOI | 90nm CMOS | 130nm CMOS |
| Wafer Size | 200mm | 200mm | 200mm |
| # Layers Metal and Composition | 1 – 5: Cu 6 & 7: Al | 7: Al | 5: Al |
| # Layers Local Interconnect | 0 | 2 | 1 |
| Top Metal | 0.36 µm | 0.85 µm | 1.2 µm, 2 µm, 4 µm |
| Mask Steps | 34 – 36 | 28 – 38 | 30 – 34 |
| Temperature Range **Assumes chip temperature can go as high as +155°C for S90 and S130 | -55°C to +125°C | -55°C to +125°C(*) | -55°C to +125°C(*) |
| ROIC (Focused Process Option) | No | Yes | In development |
| ROIC Die Stitching | No | Yes | No |
| SONOS Embedded NVM | No | No | Bit cell only, no design IP to support |
| Cryo Models | No | 45K, 77K, 120K, 150K** | No |
| Isolation | STI | STI | STI |
| Gate | Co-silicide Poly | W-clad Poly | Poly |
| Core Voltage | 1.2V | 1.2V | 1.8V |
| IO Voltage | 1.8V, 2.5V, 3.3V | 1.8V, 2.5V, 3.3V | 3.3V, 5.0V |
| High Voltage | No | No | 20+V, Drain-Extended CMOS (16V) |
| Multiple Vt Options | Yes | Yes | Yes |
| MiM Capacitor | Yes | Yes | Yes |
| Precision Resistor | 195Ω/□ (P-poly) | 120Ω/□ (N+ diff) | 2000Ω/□ 300Ω/□ (Both P-poly) |
| Inductor | No | No | No |
| OTP | In development | No | No |
| Polyimide | No | Yes – Cannot use with viatop | Yes |
| Dual-Damascene Interconnect | No | Yes | No |
| Substrates | FD SOI | Bulk, EPI | Bulk |
*RH90 is an ITAR restricted technology.
**Main flow models were simulated at a minimum temperature of -40°C for a commercial environment and at 45K and between 77K and 150K for a cryogenic environment. ROIC flow models were simulated at a minimum temperature of -55°C for a military environment and between 77K to 150K for a cryogenic environment.
Open-Source 130 nm CMOS Resources
SkyWater has partnered with Google to create the first open source process design kit, called SKY130, based on our 130 nm CMOS platform. Learn more about the PDK and opportunities to tapeout chips on open-source tool chains.
Open source SKY130 PDK on Github
Github hosts the SKY130 Open Source PDK. There you can find key information, links to resources needed to get started quickly, and support. The SKY130 PDK is supported by a dedicated and talented group who are equally excited by the opportunity of making chip development available to everyone.
SkyWater and Efabless chipIgnite program enables mass customization
Verifying proof-of-concept designs and low-volume production used to be difficult and prohibitively expensive. Not anymore.
Leveraging the SKY130 Open Source PDK, the eFabless chipIgnite platform supports both open source IP and closed IP. Delivered as packaged products, this is an ideal way for both students and professionals to develop proofs of concept and scale to initial production at a total cost far below a custom tape out and packaging.
SkyWater Establishes Cryogenic Lab, Utilizes FormFactor’s Leading Tool for RTS Noise Detection in Read-Out Integrated Circuit Applications
