Chasing After Carbon Nanotube FETs

CNTs promise big performance improvements, but achieving consistency and replacing incumbent technologies will be difficult.

Carbon nanotube transistors are finally making progress for potential use in advanced logic chips after nearly a quarter century in R&D. The question now is whether they will move out of the lab and into the fab.

… Before they move out of the lab, the industry will need to scale up these processes on a larger wafer sizes like 200mm, particularly for sub-10nm nodes, according to researchers.

A U.S. collaboration is trying to accomplish that with a twist. In 2018, DARPA launched a new program called the Three Dimensional Monolithic System-on-a-Chip (3DSoC). MIT, Stanford and SkyWater are also part of the project.

… Meanwhile, Skywater, the designated foundry in the 3DSoC project, is developing the processes to manufacture these and other technologies in a 200mm fab using 90nm processes. “If you look at advanced node silicon, we’re up against the fundamental laws of physics,” said Ross Miller, vice president of strategic marketing and business units at Skywater. “If you roll that forward and think about continued shrinkage of the geometries, there are things like leakage and power demand that are counterproductive to the whole pursuit. We need to find ways to continue to deliver performance to the market. What are the ways we can do that? There are many, but this particular one is focused on leveraging a new semiconductor material to in a sense reset Moore’s Law.”

Read the article in Semiconductor Engineering:


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